Oct 1, 2013 #1 P peshawar Newbie level 1 Joined Jan 4, 2011 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,284 I am working to desing single carrier qpsk receiver in verilog. i need help for frame synchronization in verilog/vhdl
I am working to desing single carrier qpsk receiver in verilog. i need help for frame synchronization in verilog/vhdl