Hi,
What about building a SoC for say image prcoessing or signal processing applications from available open cores? My company can help you with guidance (note: we will NOT do the coding for you) if needed and if our timelines permit. Write to me if interested @ ajeetha <> gmail.com. But please do your homework before that - this SoC will be a model/dummy and not necessarily a commercial strenght. We may even say that it will be a Transaction level model and not synthesizable. All work will be in "front end" no back end.
What's about ASIC challenges for 90nm and 65nm? Modern ASIC is shifting to 90nm and 65nm. And there are some challenging problems waiting to be conquered.
ASIC has started getting down from 65nm to 45nm now-a-days...
So how about implementing our conventional digital...analog circuits in this technology......like say some fabrication types/////
Else , see these links to get more info....
1) University of California, Berkeley
2)MIT
3)www.project.org
4)www.sonsiviri.com
5) Our very own edaboard diwcussion forum has loads of ideas....
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I think chip production test is a very good topic as test cost is a big part of whole chip. such as a 4x4mm chip, the test cost may be 1/3 of whole chip, while others is die and package.