any have done at-speed testing with occ controller?

[feel_on_on]

synopsys occ

any have done at-speed testing with occ controller?

I'm doing a AT-SPEED testing with DFT compiler and TetraMax.

But why I get waveform only have capture clock,not have launch clock.



Anyone help me ?

 

[feel_on_on]

onchip clock,occ

nobody help me ?


help me ,help me ,
anyone do At-Speed test with synopsys IP occ (on-chip clocking) controller?

 

[rameshsuthapalli]

at-speed occ

Hi,

IF you are not getting the two pulses in the capture mode means check the following.
1. wether u r PLL(OCC) is genrating the clock are not.
2.if it genrates the clock then see the clock slicer is working properly r not.
3.if the slicer is genrating the two pulses then check the toggle between the shift clock and capture clock from the OCC is happen r not.

i think you will get the proper cause for the not getting the launch pulse.

Regards,
Ramesh.S

 

[dft_guy]

occ controller capture

Are you generating launch-off-capture patterns? Maybe you are generating launch-off-shift patterns, so the last shift clock is your launch clock, and then you see the capture clock after SE goes down...

John
DFT Digest