Any good assembly language tutorial or book ?

[my_books]

good assembly tutorial

Any good assembly language tutorial or book ?

Thanks

 

[ckshivaram]

assembly language tutorial

for which controller or processor. 8 bit 16 bit 32 bit ????????????

 

[Navid T]

assembly language tutorial russian

Any good assembly language tutorial or book ?

Thanks

For which controller do you want assembly tutorial? AVR, PIC or others?
there are difference between assemly codes in different controllers.

 

[VirtualThread]

russian assembly language tutorial

Introduction To 80x86 Assembly Language And Computer Architecture

The.Art.of.Assembly.Language(32bit.edition)

The_zen_of_assembly_language

 

[lgpkarthi]

assembly language tutorial(book)

for 8085 refer ramesh goanker.
for 8086 refer ray & bhurchandi

 

[piratekoos]

The answer to this question really depends on the instruction set/architecture.

For x86, I strongly recommend 'the art of assembly language'.

 

[S-Sohn]

Here's a link to a nice AVR assembler tutorial:
http://www.avr-asm-tutorial.net/index.html

 

[my_books]

for which controller or processor. 8 bit 16 bit 32 bit ????????????

For 32 Bit Intel CPU used in desktop.

 

[electronicsrobotics]

THE PROGRAM STATUS WORD

Where:
Z is the zero flag. It is set when the result of an operation a zero.
N is the negative flag. It is set to the algebraically correct sign of the result regardless of overlows.
V is the overflow. flag. It is set it an overflow occurs.
VT is the overflow trap flag. It is set when the VT flag is set and cleared by JVT, JNVT. or CLRVT.
C is the carry flag. It is set it a carry was generated by the pnor operation.
I is the global interrupt enable b1
ST is the sticky bit it is set during a dght shiff if a one was shiffed into and then out of the carry flag.
INT _MASK is the interuptmask register and contains bits which indvidually enable the 8 interrupt vectors. Figure 5.9 PSW register

PSW stores the INT-MASK register in its lower byte so that the mask register can be pushed and popped along with the machine status when moving in and out of routines. The action of pushing flags clears the PSW which includes PSW.9, the interrupt enable bit. Therefore, after a PUSHF instruction interrupts are disabled

The PUSHF instruction saves the PSW including the old INT MASK register. The PSW including the interrupt enable bit are left cleared. If some interrupts need to be enabled while the service routine runs, the INTMASK is loaded with a new value and interrupts are globally enabled before the service routine continues .At the end of the service routine a POPF instruction is executed to restore the old PSW. The RET instruction is executed and the code returns to the desired location. Although the POPF instruction can enable the interrupts the next instruction will always execute. This prevents unnecessary building of the stack by ensuring that the RET always executes before another interrupt vector is taken www.electronicsrobotics.com