Ansys Circuit Design takes a long time for the interpolating frequencies to converge

[Full_moon_ansys]

I am trying to analyze a power amplifier layout in Ansys HFSS. The input does not match the recommended impedance suggested by the vendor. So I am trying to use the smith tool available in HFSS circuit design for impedance match design using Co-simulation. When I analyze the model, the interpolating frequencies do not converge. Actually the simulation never ends. I run it overnight, but seeing no progress. Can someone help me with Cosimulation using Ansys HFSS 3D layout and HFSS Circuit design. The frequency range is 2.5-2.7Ghz with 5Ghz solution frequency.

 

[PlanarMetamaterials]

Welcome Full_moon_ansys,

Have you tried a discrete frequency sweep?

 

[BigBoss]

If there are discontinuity points in s-parameters of the Matching Circuit, convergence can not be obtained as wanted.HB Analysis Method is very poor of Ansys EDT,old fashion and I have been frequently faced convergence problems in EDT.I prefer Keysight ADS or Cadence MWOffice.