I have seen this done in multiple CMOS op amps. The
biasing is critical, and the nonlinear behavior may hurt
large signal distortion etc. in ways that small signal
analysis will not show.
Pluses are, high resistance for low area and the possibility
that the compensation corner can track (or "compensate")
variations in gain, BW from the other amplifier devices as
it's done with the same.
I don't prefer it myself, always found it kind of touchy.
But I tend to work on stuff with wider temp range, "other"
unpleasant environments and sloppy fabs. In a fab that
ran real tight, for small signal and caring about every
square micron, though, it's an often-done thing.
The self-capacitance of the device (thin ox area, that
is returned to someplace (=?)) can be a new issue you
introduce by doing this. Pushing output signal (or prior
stage, high swing still) back onto your bias network
can give peculiar behaviors that take some thought to
untangle. If you go this way, might want a more isolated
bias to the "resistor" device's gate.