I read it, but do not manage to find how to deal with my case...
I spent the morning trying things, and i now have more informations...
Here is my schematic Hierarchy :
TOP.sch
..|_FPGA.sch
........|_Bank0.sch
........|_Bank1.sch
........|_Bank2.sch
........|_Bank3.sch
........|_Supply.sch
NB : the FPGA component has been definied as a multipart component (XC6), and each part of the component is used in one of the FPGA.sch sub-circuit (Bank0.sch uses XC6_1A,, Bank1.sch uses XC6_1B, etc...)
1. If my TOP design (TOP.sch) implements 1 FPGA structure (one sheet symbol pointing to FPGA.sch), it works well. My generated PCB has a single FPGA.
2. If my TOP design uses several FPGA structures, then the sub-circuit seems not to be recognised and i have a footprint per FPGA sub-circuit on the generated PCB
And yet, the sheet symbols used on the TOP schematic to instanciate FPGA.sch do not have the same designator, neither the same Unique ID...
It looks like if altium was not keeping the hierachy after the FPGA.sch level. It then deals several FPGA components part, but do not manage to merge them correctly to create the full component...
Some help please?
Alex