Also questions about bandgap:

[jcpu]

(1) quite some literature about BGR using MOSFET in weak inversion
instead of parasitic BJT. How do they behave in real product?

(2) we use LDO + BGR to avoid PSRR problem.
LDO output to BGR,
meanwhile input reference voltage of LDO
is taken from the output of BGR
We did check startup by transient.
But still wondering if this a good common practice?

Thanks in advance.

 

[ambreesh]

Correct me if I am wrong, this is what I understand from your 2nd question
I am not sure that bGR in LDO is used for PSRR improvement.
Are you suggesting that BGR is used for PSRR improvement in LDO.

 

[jcpu]

Dear Ambreesh:

LDO to prevent VDD noise or change from affecting BGR behavior
by more or less fixing supply voltage to BGR.
Basically that is the picture in original designer's mind.
But we wonder if this is a common practice
or there is better way to achieve same goal.

Thanks.