khouly
Advanced Member level 5
i will attach a model file of MATLAB , i have used the simulink to simulate the chargepump PLL with this spec's
refernce frequency 1KHz
divider 100
the output frequency need to be 100KHz
the charge pump current is 1mA
KVCO = 50KHz/v
and i have designed the loop filter
but when i simulate the loop , it doesnot lock . and i donot know why
can any one see the model and try it and tell me what is wrong
this version M@TL@b V6.5 R13
many thanks
refernce frequency 1KHz
divider 100
the output frequency need to be 100KHz
the charge pump current is 1mA
KVCO = 50KHz/v
and i have designed the loop filter
but when i simulate the loop , it doesnot lock . and i donot know why
can any one see the model and try it and tell me what is wrong
this version M@TL@b V6.5 R13
many thanks
