Hi,
I am implementing AES in VHDL. My goal is to design a high throughput system.In this regard i got a couple of papers.but still its not very clear to me.Can u suggest me any paper or any sort advices or discussions on high throughput design would be helpful for me.
sorry to say i don want to share the code and as the paper not published anywhere yet i cant share the paper as well. But for any sort questions or problems regarding this i can try to help....