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Address Mapping, Address Decoders, address counters, MSB address, LSB addresses

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May 11, 2015
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When a electronic technician does NOT have the address mapping sheet. how does he test the ROM , PROM and RAM chips?

What are address decoders used for? the address decoder is the address mapping? the address decoder does all the address mapping?

But what sets the address mapping, is this set in the program of a ROM chip?

The address decoder is just a bunch of logic gates so how does it know the address mapping?

What are the address counters used for? why does a logic board need address counters?

When looking at a schematic, how does a electronic technician know where the MSB addresses go to which IC Chips and which LSB address go to which IC chips? the address mapping doesn't tell which MSB and LSB addresses go to which IC chips

Wow, what is up with all these questions that are all over the place?

Is this homework? An internship that's got you in over your head? Are you a hobbyist?

The current crop of questions gets into logic design and you should probably do some reading on how to design basic logic circuits (e.g. decoders, multiplexer, comparators, etc).

To understand a schematic you get all the datasheets for all the parts and look at them and the schematic.

no I'm serious , how would a electronic technician look at a logic circuit board schematic and know these things

To increase my troubleshooting skills

They use address decoders and address counters in every logic board, but i don't know how they work or how they know about the address mapping. the address mapping must be STORED in a ROM right by a programmer?


These are very basic questions for a microprocessor or microcontroller circuit.

Therefore you need to read the basic documentations.


Imagine you have a microcontroller with 16 address lines. Each line can have two states (0 or 1)
Therefore there are 2^16 = 65536 different address locations possible.
If now you have three devices at the bus. A 32kbytes SRAM, a 8kbytes EEPROM, and a display needing 4 address locations.

The electronic technician now have to decide the address mapping by himself.
let's begin with the biggest, the SRAM. It needs half of the complete address room. To kkep it simple you could set it in the lower half , or the upper half. It depends on the microcontroller where to set it. (Stack position, wait state setting...)
I decide to set iit in the lower half 0x0000 to 0x7FFF. Then the address decoder is simple.
A0 to A14 from microcontroller to SRAM. The A15 is used to decode mapping: As long as it is 0 the SRAM is accessed.

Now there are 32kbytes unaccessed 0x8000 to 0xFFFF. Here we put the 8k EEPROM.
There are 4 possible solutions. Starting address at 0x8000, 0xA000, 0xC000, 0xE000.
I decide it to set it 0x8000 to 0x9FFF.
The address lines A0 to A12 are connected from microcontroller to EEPROM
A15, A14 and A13 are needed to decode. When they are "100" then the EEPROM is accessed

Then the display.
It has only 2 address lines. To keep the address decoder simple you may just decode the upper three address lines.
I decide it to put it in the upper block starting at 0xE000. Then the display is accessed when A15, A14, and A13 show "111".
With this solution the display is acessed multiple (2048) times. 0xE004, 0xE008, 0xE00C......

The hardware developer needs to tell the three starting addresses to the software developer.

For sure ther are numerous other combinations possibke. Although this is a simpke address decoder solution, you could even more optimize the address decoder.


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