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ActiveHDL7.2 Student Edition/Xilinx 11.1/Nexys 2 fpga

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cyboman

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i'm relatively new to digital design but i'm very interested in the topic. i did take introduction to digital design class but wanted to learn more, so i purchased a book (introduction to digital design from lbe), nexys 2 fpga and installed all appropriate software. i tried working out the first example (it simply connects leds to the switches on the board) but immediately received an error at the implementation stage. i did follow the instructions in the book step by step but it seems like there is something wrong. i have attached the log to this post. i would really appreciate if anyone could look at it and let me know what is the problem. i'm new to all these tools but i really want to learn.

i think this is the error:

Executing C:\Xilinx\11.1\ISE\bin\nt\map.exe -p 3S500EFG320-5 -o "map.ncd" -pr b -k 4 -cm area -c 100 "sw2led.ngd" "sw2led.pcf"
Release 11.1 - Map L.33 (nt)
Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved.
Portability:90 - Command line error: Switch "-k" is not allowed.

but i don't know how to disable -k with ActiveHDL7.2

thanks.
 

Hi Dear Sir,

I 'd buyed the same NEXYS2 2 week ago and I have exactly the same problem> I have the same message.

Did someone find the solution?

Thanks for reply.

Pitbuell94.
 

Hi Dear Sir,

Concerning your problem, I check this too long time for me.

I never find a way to solve it.

I spent too much time so I decide to move all I done to XILINX ISE WEBPACK.

I use in the same time ADEPT suite and now all is running.

I don't receive any reply concerning this problem from the supplier.

As soon I use My code with XILINX ISE, everything turn fine.

So, to end this discussion, Even if you prefer use ACTIVE HDL, use XILINX web pack..

I never learn VHDL language.

I learn it since two weeks and today I use my first running code on NEXYS2.

Do you have the tutorial to use XILINX ISE WEBPAK?

I find one who allow you to really design code and flash your NEXYS in around 20 minutes.

You can believe me> I' m a newbie.

Have a look on this tutorial.

Best regards.

Pitbuell94.
 

    cyboman

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Hi Cyboman,

I stop to use ACTIVE HDL.

I only use XILINX ISE 11 webpack > be carefull because there is some version not complete.

It work fine> I post an other topic on edaboard because I need to repair olds TV black and white from the 40 and 50's with tube technology and I'm trying to built a pattern generator.

I also use the ISIM ISE from the webpack to simulate the video signal for french TV with 819 ligne by frame> have a look at the attached document.

I test it on my NEXYS2 and it work fine.

Concerning your message, I'd never had this message.

Concerning the adept suite, you should know that few weeks ago, Adept change the software to program the NEXYS2.

Some fault occurs when you connect your board to computer > not seen by the ADEPT suite.

If you need some information concerning ISE 11 and ISIM, maybee I can help you > don't forget I 'm a newbee from the stoneage but I try my best to find a way.

Pitbuell94.
 

i have run into the same problem while using activehdl 7.2. This issue can be solved by editing the map.bat file which is created automatically by ActiveHDL when you run the implementation. This file is located somewhere in your design folder e.g ../implement/ver1/rev1/map.bat
To edit this file, open it in notepad and you would see something similar to the following:

HTML:
@set XILINX=C:\Xilinx\13.2\ISE_DS\ISE
@set PATH=C:\Xilinx\13.2\ISE_DS\ISE\bin\nt
@C:\Xilinx\13.2\ISE_DS\ISE\bin\nt\map.exe  -p 3S1500FG320-5 -o "map.ncd"  -pr b  -k  4  -cm area  -c 100 "gate2_top.ngd" "gate2_top.pcf"

simply delete the "-k 4" and save the file.

Now back to the design flow, click on the options menu for Implementation and select submenu "Map". Check the checkbox at the last row that says "run map.exe with selected command file (map.dat)", and browse to select the location of your map.bat file.

And you're done. Rerun implementation on the design flow to test it out.
 

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