About using 3 MOS modeling the induced gate noise of NMOS

[yorande]

I find this kind of model on standfords website,
from **broken link removed**
and the model subcircuit is as follows:
** Noisy NMOS model (note: noisy PMOS models is not provided)
*************************************************
.subckt NNMOS vd vg vs vb w=1.2u l=0.35u nf=1 sx=1 dx=1

.param AS1 ='sx*w/nf*1u*(nf+1)/2'
.param AD1 ='dx*w/nf*1u*(nf+1)/2'
.param PS1 ='sx*(1u*nf+1u+w/nf)'
.param PD1 ='dx*(w/nf+1u)*(nf+1)'
.param Rsq =6

Rg vg vgate 'Rsq*w/(3*nf*nf*l)'

M1 D1aux vgate vs vb cmosn W='W' L='L' AS='AS1' AD='AD1' PS='PS1' PD='PD1'

Vsens1 vd d1aux 0

M2 D2aux vgp1 0 b2 cmosn W='W' L='L' AS='AS1' AD='AD1' PS='PS1' PD='PD1'

Vsens2 d2 d2aux 0

E11 vgp1 aux2 nr1 0 -1
E12 d2 0 vd vs 1
E13 b2 0 vb vs 1

C2 nr1 0 'W*2n'
G1 nr1 0 nr1 0 10p

F11 d2 nr1 vsens2 1
F13 nr1 0 vsens1 1

M3 D3aux vgp2 0 b3 cmosn W='W' L='L' AS='AS1' AD='AD1' PS='PS1' PD='PD1'

Vsens3 d3 d3aux 0

E14 vgp2 aux3 nr2 0 -1
E15 d3 0 vd vs 1
E16 b3 0 vb vs 1

C3 nr2 0 'W*2n'
G2 nr2 0 nr2 0 10p

F12 d3 nr2 vsens3 1
F14 nr2 0 vsens1 1

Vsens4 aux2 0 0
Vsens5 aux3 0 0

F21 vgate vs POLY(2) vsens4 vsens5 0 0.2818 -0.2818

.ends

But why could this model the induced gate noise?
Any theory surpoort?
Thank you.

 

[v_naren]

Re: About using 3 MOS modeling the induced gate noise of NMO

this truly a great find....thanks a million
the detailed explnation as to how spice has been cheated into believing the induced gate noise is present is explained most clearly and beautifully using this same model file sub-circuit in the book




its amazing as how u could lay your hands on this model file!!!!

thanks a lot...