this DAC is current-steering, in test, the SNR of DAC in one aspect (sample and signal frequency is changed) exceed 50dB, but the SNR of ideal 8bit DAC is 50.
is it normal? or the test is wrong?
the 8 bit dac has 1/256 quantizing noise. so maximum signla to noise ratio will be
S/N max = 20 log 1 / (1/256) = 48dB
this means that S/N ratio at 8 bit DAC never exeed 48dB.
About test environment: FPGA supply 14-bit digital signal---DAC process--return the output of DAC under test to FPGA, ADC in FPGA(12bit-ADI)output, then, FPGA collect the digital signal, using matlab, process it.