According to the DDR SDRAM datasheet from Micron, the logic level of CKE is going to be changed from LVCMOS low to SSTL 2 high during system initialization.
there are only two logic levels high and low, all you need to do it just switch from low to high, because you are doing this during init stage it doesn't really matter which standard is that, as far as you within limits of 2.5V being logical high