nmtr
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Now, in simuliation of HDL (vhdl and verilog),testbench is very important, i have used the sync@d's te*stbencher pro* to generate testbench automatically in windows OS, but it don't work fine in solaris OS, it work too slowly with bad perform.
Can anyone introduce a new tools to generate testbench automatically,both in windows or UNIX OS are wellcome. thanks.
Can anyone introduce a new tools to generate testbench automatically,both in windows or UNIX OS are wellcome. thanks.