about building high-level model

[eexuke]

Hi all,
Can anybody give me some suggestions about how to build a high-level model? For example,which tools should I use, C,systemC,systemverilog or whatever? I just want to build a model to verify a video processing system.

Many thanks in advance and Happy new year to all!

 

[sidir]

Use your most familiar language, I think. It will help you to build the model as soon as possible. Then you can pay more time in writing good HDL codes for the system.

 

[zyphor]

I think the most important question is schedule

The language your team member is familiar is more important than the language your team member likes.

 

[nemolee]

You can use familiar language to design your product, like verilog HDL or VHDL. Although systemC is the newest language, but it is not familiar in industrial. If you have any question, many people can help you.

 

[haosg]

for video processing system, you better create a C model,
I think the C language is sufficient.
Then Verilog and Vhdl for hardware coding with your prefer.

You can compare the hardware simulation results and C model resutl.

 

[weilijun]

I think systemC is a better choice if you want to build hardware model.

 

[geconom]

For languages, I think C or SystemC (if you are willing to spend some extra time learning its syntax) are the best choices.
For tools, Celoxica's DK and Mentor's CatapultC claim to perform automatic hardware translation into VHDL and/or Verilog. However, you may have to optimize the generated code!

 

[ram]

i agree with weilijun , if you final aim is RTL go for systemc ....you can refine the same systemc model for rtl.

 

[tybhsl]

what are "systemC,systemverilog"? Thanks.

 

[chopra]

Response to geconom's post.

What do you mean by "Optmize the generated code"? Doesn't CatapultC suppose to do it automatically?

 

[Cortex]

@chopra
i think he mean to increasing Speed of the Code
something like Compression

 

[adap]

I think C is a good choice for high level design. You can write your algorithm in a C model and the RTL design can be verified against this model.

 

[bigyellow]

Now, C or matlab are enough for modeling.

I think systemC and systemverilog are good choices in future. too few people familiar with them right now.

 

[zhangpengyu]

C is best!!

 

[sarath51]

C whould be the ideal Lanaguge to model such applications