Not intrinsically. Damage will come from overcurrent @
the high avalanche voltage (power density, thermal
rise sufficient to spike metallization into the junction or
simply open it, etc.). Drift will be a consequence of so
many "hot" carriers generated. Limit these and the
breakdown event can be survivable (see avalanche
rated MOSFETs and diodes for power conversion). But
a device / application never designed for survivability,
shouldn't be expected to tolerate it - you might be
able to put a box around it based on testing, but you
may then be "surprised by the outlier" on a performance
parameter that is defect sensitive but those defects
never exposed by unit level test.