hazemafify said:What is the technology you simulate in it ?
Yes, my M1 & M2 are cut off showed in the hspice! (I misunderstand the subthreshold region?It seems that your M1 is turning off. what are the Vt of Nmos devices? Are they comparable to that of the paper's? And, what kind of current do you have going thru M1 and M2? Are they comparable to the paper's?
To me, it seems like your biasing conditions i.e. the current need to be adjusted.
Another major point that I dont understand is why is the bulk of M1 connected to its drain? Are you counting on the source to bulk diode not turning on?
transbrother said:jeremy,
Thank you for your answers. For the bulk diode to turn on Vgs2 - Vref > 0.7. Is this condition in danger of being violated?
And, in subthreshold your Vgs should be approximately equal to Vth. Seems like this is not the case. Since M2 sets the independent control voltage, you might want to reduce its w/l to increase its VGS to make it close to Vth,nmos.
the resistance of Rb or NMOS?The resistance should be large enough for the subthreshold operation.
i found in the paper ib thru rb is about 230nA, meanwhile the Isub leakage current is only 0~~200pA,so 200pA at 100 degree can be negligible compared with ib.but i can't know how he could got this 200pA with S1(188u/10u),S2(50u/10u) while I2/Ib=3.5.transbrother said:jeremy,
I understand what the paper is trying to convey now. Try increasing the current thru M1 and M2 by a factor of two or so to see if the curves are more behaved. It also will be worthwhile checking if the current thru the transistors have a ptat behavior, which they should.
transbrother said:I think you can find the relationship between M1, 2, 3, 4, and Rb as follows:
You know the relationship between m1,2 and Rb from equation in 3.gif.
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?