a quetion about voltage reference

[jeremy_zhu]

I’m reading a paper whose M1 & M2 of the ckt works in subthreshold region. In the paper, the Vgs2 VS Temp & Vgs1 VS Temp is just linear. But in my simulation ,the figure is not very good! The useful equation & my figure are attached below.(0.35um process in the paper).so my Vref fluctuation Vs Temp is bad!
Any good suggestions？what’s the key problem? Aspect ratio S4 & S1? but the TC changes little with different S1 & S4!

 

[hazemafify]

What is the technology you simulate in it ?

 

[jeremy_zhu]

What is the technology you simulate in it ?

0.25um (Kt1 & NCH may be a little bit different)

 

[transbrother]

It seems that your M1 is turning off. what are the Vt of Nmos devices? Are they comparable to that of the paper's? And, what kind of current do you have going thru M1 and M2? Are they comparable to the paper's?
To me, it seems like your biasing conditions i.e. the current need to be adjusted.

Another major point that I dont understand is why is the bulk of M1 connected to its drain? Are you counting on the source to bulk diode not turning on?

If so, it seems like there is a condition on Vref. That is, Vref + Vth, nmos << 0.7V. Is that so?

 

[jeremy_zhu]

It seems that your M1 is turning off. what are the Vt of Nmos devices? Are they comparable to that of the paper's? And, what kind of current do you have going thru M1 and M2? Are they comparable to the paper's?
To me, it seems like your biasing conditions i.e. the current need to be adjusted.

Another major point that I dont understand is why is the bulk of M1 connected to its drain? Are you counting on the source to bulk diode not turning on?

Yes, my M1 & M2 are cut off showed in the hspice! (I misunderstand the subthreshold region?
M1: vgs 262m vth 422m vds 262m; M2 : 434m 478m 434m, are they working in subthreshold region?)
Vt of nmos and pmos are 0.5V &-0.6V (0.5V ,-0.65V in the paper), id through M1 and M2 are 209n ,751n. ibs 5.4n in M1 and -3.6e-20 of M2 (I don’t know the value in the paper!)
Bulk of M1 connected to its drain is likely to decrease the vth of M1,from the Vbs and ibs above ,is the diode turning on in 0.25um process?

 

[transbrother]

jeremy,

Thank you for your answers. For the bulk diode to turn on Vgs2 - Vref > 0.7. Is this condition in danger of being violated?
And, in subthreshold your Vgs should be approximately equal to Vth. Seems like this is not the case. Since M2 sets the independent control voltage, you might want to reduce its w/l to increase its VGS to make it close to Vth,nmos.

 

[woodman]

The resistance should be large enough for the subthreshold operation.

 

[jeremy_zhu]

jeremy,
Thank you for your answers. For the bulk diode to turn on Vgs2 - Vref > 0.7. Is this condition in danger of being violated?
And, in subthreshold your Vgs should be approximately equal to Vth. Seems like this is not the case. Since M2 sets the independent control voltage, you might want to reduce its w/l to increase its VGS to make it close to Vth,nmos.

the bulk bias is to lower the threshold with the diode turning off. M2? it should be M1, is that right?

The resistance should be large enough for the subthreshold operation.

the resistance of Rb or NMOS?

 

[transbrother]

jeremy,
I understand what the paper is trying to convey now. Try increasing the current thru M1 and M2 by a factor of two or so to see if the curves are more behaved. It also will be worthwhile checking if the current thru the transistors have a ptat behavior, which they should.

 

[jeremy_zhu]

jeremy,
I understand what the paper is trying to convey now. Try increasing the current thru M1 and M2 by a factor of two or so to see if the curves are more behaved. It also will be worthwhile checking if the current thru the transistors have a ptat behavior, which they should.

i found in the paper ib thru rb is about 230nA, meanwhile the Isub leakage current is only 0~~200pA,so 200pA at 100 degree can be negligible compared with ib.but i can't know how he could got this 200pA with S1(188u/10u),S2(50u/10u) while I2/Ib=3.5.
what's the paper convey is not a ptat behavior but a good Temp independent Vref. my ibs Vs Temp is attched below!(my S1=18.8u/0.8u,S2=5u/0.8u ).
how can i get such a low Ibs, maybe that's my key problem!

 

[jeremy_zhu]

m1 2 2 6 2 nch w=? l=?
r 6 0 ?k

in this situation , how can i get the ibs(bulk to source) less than 200p(campared to Id whose value is about 200nA or some other proper value(nA)) (t=373k). m1 is woking in the subthreshold region with TSMC.25 process & the voltage at node 2 is about 400mV.

 

[transbrother]

Jeremy,

I have a few questions for you:
1. Your bulk current (which you call Ibs) is definitely a problem if it is almost of the same magnitude as the drain current. Is Ibs high because the bulk diode is forwad biased? Or, because of leakage? What is the voltage difference between the drain of M1 and source of M1? Is it much less than 0.7V?Please try to make this voltage as low as possible and see how Ibs is chaning.

2. Please correct my understand of the paper. What the paper is trying to convey is that:
If M1's bulk were tied to its source, you'd have a ptat voltage across Vref. But since the bulk is being modulated by connecting to M1's drain you have an addition temperature term that cancels the ptat behavior. Therefore, you get a temp-independent voltage. Am I right?

 

[jeremy_zhu]

1. the Vgs1 is about 200mv,Vbs1=Vgs1=Vds1,so the bulk is forword biased. Vds1<0.7V. i also want to make the voltage as low as possible,but it is hard to make m3 m4 works in saturation region and m1 m2 in the sub-threshold region! M1,2,3,4 & Rb have certain relationship, but it's hard to find them!
2. what you think is correct!

 

[transbrother]

I think you can find the relationship between M1, 2, 3, 4, and Rb as follows:

You know the relationship between m1,2 and Rb from equation in 3.gif. This gives the relationship between Vref and W/L1,2. From here you know the value of current thru Rb for a particular temperature. If you know this current, you can use your saturation equation to find the W/L needed for M3 and M4.

 

[jeremy_zhu]

I think you can find the relationship between M1, 2, 3, 4, and Rb as follows:

You know the relationship between m1,2 and Rb from equation in 3.gif.

thank you for your good advice。can you give further details about what i quoted！

 

[transbrother]

I think your question is how you can reduce Ibs.

I think you need to figure out if Ibs is flowing due to leakage or the body diode forward biasing. If the drain of M1 (positive terminal of op amp) is greater by 0.7V than Vref then the diode is forward biased. From what you are saying seems like this is the case.

If this is the case, why dont you tie the bulk to a voltage source and see what that voltage needs to be in order to obtain Ibs = 0 and for the Vref to be temp. independent? When you find out the right bulk voltage you can size M2 to match that voltage; and, you can tie the bulk of M1 back to its drain and you have a working solution.