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naalald said:What are the key points in designing a comparator? (In addition to the offset)
You have to be careful, increasing the size of the input pairs will increase the capacitance and then increase the kickback and can reduce the speed.leo_o2 said:Increasing size of input pairs will reduce offset.
I think speed and power consumption will be the conflict.
little-nemo said:You have to be careful, increasing the size of the input pairs will increase the capacitance and then increase the kickback and can reduce the speed.leo_o2 said:Increasing size of input pairs will reduce offset.
I think speed and power consumption will be the conflict.
Concerning the current source, if you remove it, it should not work !!
The current source is needed to bias the differential pair.
Check your current without the biasing current source. I bet it's higher than when you do use it. Hence it's faster...naalald said:Hi leo_o2,
Thanks for your reply. What is the tolerable value of the input capacitors? Another point; I want to know what the role of the current source in the comparator shown in the figure below is.
What if it's removed? As I have tested, without the current source it's working better!
lsimeon said:hey,
the important function of the current source in your schematic is being a pull-up current source, if you will remove it, your comparator's performance on the high voltage side will have a higher delay..
its impact on the power consumption will of course be higher, it is because your transistors will consume more current for biasing..
naalald said:What are the key points in designing a comparator? (In addition to the offset)
jecyhale said:naalald said:What are the key points in designing a comparator? (In addition to the offset)
You should not remove the current source, because current source limit the current of circuit, and this is a very important performance.
And the other performance is high speed with limited current.
Besides, the phase noise of it is alse consided.
The key points are offset, current consummation, speed (resolution) and phase noise.
lsimeon said:Could you please explain about the sentence you said: "your comparator performance on the high voltage side will have a higher delay"?
im referring here the positive voltage trail or the rising edge of the comparator's voltage curve.. if you are going to remove that current source and you are going to plot its voltage with respect to time you will notice that the slope of its rising edge will becomes smaller. it means that there will be a higher time interval for the comparator to reach the maximum voltage from its lowest voltage..