Re: a problem related to multi_finger structure--- how stra
skal81, thank you very much for enlighting me on this topic.
However, there is another point I wanna mention here. As you said, using fingers or parallel transistors may lead to different result after simulation. So, the way to write netlist or schematic need our pondering. Usually, the differences of these 2 ways of layout are thought to be their Cgd and Cgs. As a result, I was told, "there won't be many differences between them in low frequency." However, in simulation, I found that in some DC case, the results of the simulation are different. Atention, I used same fingers. For example, for a w=10 transistor, I uses a transistor with 2 fingers and w=5, or, 2 transistors each with one finger, w=5. The fingers of these 2 ways are the same: 2=2*1. Thus, their resistance of the gate are the same theoretically. So, where comes the differences in DC simulation?