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65nm 4mA CURRENT REFERENCE

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analogdesigncdac

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Hai

I have to design a current reference of 4mA in 65nm technology(VDD=1.2v).
In the circuit shown at the points A and B i need a voltage of 0.6v for my opamp biasing(MOS Vth 0.56v). with these combination of current and voltage the resistors i have to choose are below 1k. Is it ok to choose these low value of resistors. i appreciate if anybody could help me and suggest any other circuit(I=4mA)

with regards
satya
 

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... with these combination of current and voltage the resistors i have to choose are below 1k. Is it ok to choose these low value of resistors. i appreciate if anybody could help me and suggest any other circuit(I=4mA)

Such low resistor values are quite ok, if you can build them with L >> W in poly (metal would take too much space).

Your circuit seems a bit wasteful as you consume 2*4mA, even if you just need it once. I'd suggest to generate a (e.g.) 0.4 or 1mA current source and multiply it via the W/L ratio - using multiplication via multiple transistors (array) or fingered ones.

Inaccuracy of this multiplication method won't matter too much, because the resistors and their ratios probably account for larger absolute inaccuracies, anyway, incl. their temperature dependency.
 
erikl, but resistor R4 does not introduce error when it comes to PVT variations?

You're right, R4 doesn't introduce an error, as long as it doesn't make an overload to Vref.

Regarding the other resistors, there are always absolute errors because of over-the-wafer and process (lot) variances, and of course because of the resistors' temperature dependency.

You were right suggesting an external resistor standard.
 
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Yes, but for example, when I tried to design that circuit to get a reference voltage higher than the BGV, when doing corners, that voltage reference had a higher variation when compared to the traditional BGVR circuit. I think that was because of that resistor at the output. Have introduced a bug error at the output votlage reference because of the process variation corner.
 

... when I tried to design that circuit to get a reference voltage higher than the BGV, when doing corners, that voltage reference had a higher variation when compared to the traditional BGVR circuit. I think that was because of that resistor at the output. Have introduced a bug error at the output voltage reference because of the process variation corner.

Not the external resistor is the culprit, but your trial to design that circuit to get a reference voltage higher than the traditional BGVR. Min. variation is achieved only at the "traditional" BGV (about at the max. of the BGV vs. temperature curve). See e.g. this sensitivity calculation: View attachment Vbg_and_mos_current_mirror_sensitivity_calculation.pdf.
 
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