iwpia50s said:
Are you doing library characterization or simply using an existing library with pre-characterized cells? If library characterization then it is more difficult to explain but if you are using an existing library then the cell characterization are in the timing library. Typically for 65nm, data path signals slews on worst PVT are about 200 to 300 ps.
Hi all,
I designed some gates for a library and I'm doing the characterization.
I'm sorry cause I'm not familiar with this technique, can you iwpia50s through more light on the PVT ?
Thanks again.