6 bit full adder Xilinx

[starman2578]

I need to make a 6 bit full adder using verilog(Xilinx).And I need to use a 4 bit adder and two 1 bit adders. Can you guys please help me?

This is how I start:

module adder6(
output[6:0] sum,
input[5:0] a, b);

 

[aruipksni]

I need to make a 6 bit full adder using verilog(Xilinx).And I need to use a 4 bit adder and two 1 bit adders. Can you guys please help me?

This is how I start:

module adder6(
output[6:0] sum,
input[5:0] a, b);

All you need is to cascade them.
If you have full adder then you have
Cin input so you connect it to carry out from
Other adder.