Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

6 bit full adder Xilinx

Status
Not open for further replies.

starman2578

Newbie level 1
Joined
Oct 14, 2013
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
6
I need to make a 6 bit full adder using verilog(Xilinx).And I need to use a 4 bit adder and two 1 bit adders. Can you guys please help me?

This is how I start:

module adder6(
output[6:0] sum,
input[5:0] a, b);
 

aruipksni

Full Member level 6
Joined
May 23, 2013
Messages
346
Helped
68
Reputation
136
Reaction score
66
Trophy points
1,308
Activity points
3,004
I need to make a 6 bit full adder using verilog(Xilinx).And I need to use a 4 bit adder and two 1 bit adders. Can you guys please help me?

This is how I start:

module adder6(
output[6:0] sum,
input[5:0] a, b);

All you need is to cascade them.
If you have full adder then you have
Cin input so you connect it to carry out from
Other adder.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top