4046 PLL - how to obtain good noise rejection and stability

[Eugen_E]

4046 pll

I'm using the 4046 PLL with type 2 phase comparator (I need full VCO range lock)
with external VCO, at about 100kHz.
To make a stable PLL i use the classical lead-lag filter with 2 resistors and 1 cap with enough damping.

The question is how I can attenuate enough the pulses from the phase detector that reach the VCO input ? If I damp enough the loop for stability, the filter attenuation would be too low.

Can I use another RC filter after the lead-lag filter, with pole frequency much higher than that of the lead-lag?
The lead-lag pole is at 100Hz, and I added an RC LPF with a pole at 3kHz, but to my surprise the loop can't lock in this case and the frequency fluctuates around the correct value.

 

[PaulHolland]

pll 4046

Your fase shift is to big that is why it won't lock. On Internet you can find a program from Philips about the 4046 that allows you to calculate the components of the filter with best performance and hence lock range stability and suppression of frequency. I still must have it on a floppy if I find I will post.

Link to the program on internet: hxxp://www.elektroda.net/download/file849.html

 

[Eugen_E]

4046 circuits

Thanks for the quick reply.
I downloaded the program and i think it's perfect. I'm using an external LC VCO at 27-31MHz (for 0<Vin<5V) and a divider N=256.
Please correct me if i'm wrong regarding parameters i entered to the program:
- VCO input voltage range = 2.5V (it should be 5V since 0<Vin<5V ? );
- VCO center frequency = 29MHz;
- 2fR = 4MHz (i think it's the full VCO range).

74HC4046 it's powered at 5V.