gate contacts on both sides in layout

[preethi19]

Hi when doing the layout i have noticed that if say a transistor then at only one end of the poly a contact is attached and connection is given. But say i have a cell A,B and C respectively. B is in the center of A and C. The gate of B needs to be connected to both A and C. So can i put contacts on both sides of the poly in B and use metal to connect it to A on left side and C on the right. Is it a right way to do that??? Or should gate have contact only at one end??? Pls help

 

[dick_freebird]

Contacting both ends reduces Rg if the two ends are
strapped by common metal. I would not route through
a gate segment unless it was within the boundaries of
a single low level cell (like, standard cell library DFF
would suffer if forced to use M1 and above only, and
can probably stand some greater than ideal resistance
in the internal routing).

If you run current through the gate stripe then you may
see longitudinal debiasing effects, DC or transient. This
will not be modeled most likely. So don't, or overstrap
with metal.

RF CMOS designers almost always contact both ends
of the gate.