+-------------+
| Truth Table |
+-------------+
+-------------------------------------------------------------------------------------+
| C B A ENABLE Q0 Q1 Q2 Q3 Q4 Q5 |
+-------------------------------------------------------------------------------------+
| X X X 0 0 0 0 0 0 0 |
| 0 0 0 1 1 0 0 0 0 0 |
| 0 0 1 1 0 1 0 0 0 0 |
| 0 1 0 1 0 0 1 0 0 0 |
| 0 1 1 1 0 0 0 1 0 0 |
| 1 0 0 1 0 0 0 0 1 0 |
| 1 0 1 1 0 0 0 0 0 1 |
| 1 1 0 1 0 0 0 0 0 0 |
| 1 1 1 1 0 0 0 0 0 0 |
+-------------------------------------------------------------------------------------+
// 3-to-6 decoder with an active-high enable (E)
// and active-high outputs (C is msb and A is lsb)
module _3_to_6_decoder(C, B, A, E, Y);
input C, B, A, E;
output [0:5] Y;
reg [0:5] Y;
always @(C or B or A or E) begin
if (E == 1)
case ({C,B,A})
3'b000: Y = 6'b000001;
3'b001: Y = 6'b000010;
3'b010: Y = 6'b000100;
3'b011: Y = 6'b001000;
3'b100: Y = 6'b010000;
3'b101: Y = 6'b100000;
default: Y = 6'b000000;
endcase
else Y = 6'b000000;
end
endmodule
(output reg[5:0] op_y,
input [2:0] ip_a,
input ip_en);
//*****************************
always@(ip_en,ip_a)begin
if(ip_en == 1'b1)begin
if(ip_a == 3'b000)op_y=6'b000001;
else if(ip_a == 3'b001)op_y=6'b000010;
else if(ip_a == 3'b010)op_y=6'b000100;
else if(ip_a == 3'b011)op_y=6'b001000;
else if(ip_a == 3'b100)op_y=6'b010000;
else if(ip_a == 3'b101)op_y=6'b100000;
else op_y=6'b000000;
end
else
op_y=6'b000000;
end
I am sorry I don't understand your question. Can you please re-phrase it?funjoke said:but just now you gave that code is which part
now got 2 part for this question
a)module definition
b)use case only to describe it
I know right !! :wink:daviddlc said:mmm, this post has been already too long for a pass year question.....
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