2M multiplication method

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promach

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Have anyone used this 2M multiplication method ?

By trading a small factor of logN in the asymptotic area, the following algorithm gives a feasible and nicely regular silicon layout
Click to expand...

1) How does the increase of logN in area complexity resulted in regular layout ?

2) Besides, adding those '2' (or two '1's in binary, just imagine putting 1'b1 on top of each other vertically) by itself also requires carry-save adders which may also contribute to the overall latency or delay as well as resulted in irregular layout ?



 
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Most people now (and for many years) just use embedded multipliers. They are now cheap and plentiful.
What are you reasons you are investigating logic multipliers from many years ago?
 

For study purpose.

How exactly is the increase of logN area used for producing regular layout ?
 

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