Clock reconvergence pessimism removal (CRPR)

[balavinayagam]

Hi all !!

what is CRPR?
I have a basic doubt of why CRPR is done...It is a problem in On Chip variation (OCV) where we take two different corners (i,e fast and slow path delays)
actually this can be a true scenario right?? why do we need to remove it?

and what do they mean by reconvergence

Pls clr my doubts

Thanks in advance

 

[lostinxlation]

There should be a lot of documents regarding CRPR at Solve-it.
For short, when you run PT with OCV, it creates the worst case scenario, like analyzing setup timing using slow corner for lanunching clock path, and fast corner for capturing clock path. The issue is these clock paths share the common path way upstream of the clock trees and OCV applies the different delay for those clock buffers on the common path. In reality, it is not possible that a single instance has both of slow and fast corner characteristics and CRPR forces those cells common to both of launch and capture clock path to use the same delay.

 

[birdy123]

Hi,

i know its old one .. but just for information if anyone else is looking about CRP is Please cehck the following blog.
VLSI concepts: Clock Reconvergence Pessimism (CRP) basic

 

[balavinayagam]

Thanks all

 

[vijay82]

Is CRPR same as CPPR(common path pessimism removal)?

 

[fab32]

Hi,

i know its old one .. but just for information if anyone else is looking about CRP is Please cehck the following blog.
VLSI concepts: Clock Reconvergence Pessimism (CRP) basic

wow good site !!! Thanks birdy123 !!!:grin: