Er_SJSU
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Hello All,
I want to design 12V-5V Unregulated I/P to 3.3V,1A Regulated O/P Linear Voltage Regulator using CMOS 0.6um Technology with Cadence tool.
Can any one please suggest me correct Topology?
I have knowledge of LDO but I am not sure for this problem LDO topogoly is suitable or what because Drop out voltage range is very big.
Any reference material will also appreciated.
Thanks
I want to design 12V-5V Unregulated I/P to 3.3V,1A Regulated O/P Linear Voltage Regulator using CMOS 0.6um Technology with Cadence tool.
Can any one please suggest me correct Topology?
I have knowledge of LDO but I am not sure for this problem LDO topogoly is suitable or what because Drop out voltage range is very big.
Any reference material will also appreciated.
Thanks