Vonn
Full Member level 4
Hi all ,
Iam designing a board working in a telecommunication field
this board have FPGA and PPC . I had to use 100MHz clock for the
FPGA ...
1- Does this frequency can affect any track passing in the same position
but in another layer
2- Does this frequency can affect a near track carrying a voice channel
3- How can I protect the affection caused by this frequency ,if any,
should I surrounded this track by a ground track ? or empty the
power polygons in the other layers in the same position ?
Thanks
Iam designing a board working in a telecommunication field
this board have FPGA and PPC . I had to use 100MHz clock for the
FPGA ...
1- Does this frequency can affect any track passing in the same position
but in another layer
2- Does this frequency can affect a near track carrying a voice channel
3- How can I protect the affection caused by this frequency ,if any,
should I surrounded this track by a ground track ? or empty the
power polygons in the other layers in the same position ?
Thanks