i need to design a high efficient step up charge pump with minimal pump capacitors (1pF each) and few stages (N < 10) sourcing a current up to 1mA. any suggestion?
My thinking that you could use pump two times 2X mode and 1 time (may be 2 times) 1.5X mode. So you can get higher 10V. But be carefully with output resistance of each stage. Correct me if I wromg. Thanks!
with a load current as large as 500uA and 1pF pump capacitors, i couldn't get the 2x or 1.5x voltage "gain" on the charge pump for each stage. hence, the 10 stages charge pump. is there any other ways to pump more efficiently?
u mean output resistance being too large and loading down the voltage?
i need to design a high efficient step up charge pump with minimal pump capacitors (1pF each) and few stages (N < 10) sourcing a current up to 1mA. any suggestion?
I think the problem is not the 10v output voltage ,but the 1mA load current with so small caps.To supply such a large current, the switch frequency must be quite high,maybe 10meg,the efficency can't be high.Just guess/
Hi, 1pF !?!?.. Make sure your switching devices have a very very low resistance and you can calculate your frequency by I * t = U * C. If you need 1 mA I calculated a time t of: 10 Ghz with a rimple of 100mV so this is impossible !!. increase you capacitor to 1 nF and you have a frequency of 10 MHz !. With a dirksen charge pump you get the following formula: U = (Ui - Vf) * N + Ui. Vf is about 0.5 V (diode). Ui = 1.8 Volt in your case. U = (1.8 -0.5) * 10 + 1.8 := 14.8 V unloaded !!..
isn't reliability an issue with the flying capacitor (pump capacitor) being usually implemented by a mos cap? (Vgd = Vgs > 7 or 8V) on an 0.18um process as i have seen on many charge pump implementations on papers?
for a VCO-controlled regulated (by error amplifier driving VCO control input) charge pump, how should the dominant pole (of the error amplifier) be specified? should it be less than the lowest frequency setting of the VCO?