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[Moved]: Questions regarding switching regulator efficiency

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Plecto

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Hi. I'm looking for a dual low quiescent current switching regulator, but theres a couple of things I don't quite understand with these regulators. Looking at the LTC3622 (http://cds.linear.com/docs/en/datasheet/3622fc.pdf); it has two modes it can go into if the ouput current is low enough, burst mode and pulse skipping mode. The datasheet states the following:

Two discontinuous conduction modes (DCM) are available
to control the operation of the LTC3622 at low currents.
Both modes, Burst Mode operation and pulse-skipping
mode, automatically switch from continuous operation to
the selected mode when the load current is low.

To optimize efficiency, Burst Mode operation can be selected
by tying the MODE/SYNC pin to INTVCC. In Burst
Mode operation, the peak inductor current is set to be
at least 400mA, even if the output of the error amplifier
demands less. Thus, when the switcher is on at relatively
light output loads, FB voltage will rise and cause the ITH
voltage to drop. Once the ITH voltage drops low enough,the
switcher goes into sleep mode with both power switches off.
The switchers remain in this sleep state until the external
load pulls the output voltage below its regulation point.
When both channels are in sleep mode, the part draws an
ultralow 5µA of quiescent current from VIN.

To minimize VOUT ripple, pulse-skipping mode can be
selected by grounding the MODE/SYNC pin. In LTC3622,
pulse-skipping mode is implemented similarly to Burst
Mode operation with the peak inductor current set to be
at above 66mA. This results in lower ripple than in Burst
Mode operation with the trade-off being slightly lower
efficiency.
Click to expand...

Does this mean that burst mode and pulse skipping mode is essentially the same, the difference being that burst mode has 12 times as high inductor current which leads to a higher output capacitor which again leads to longer time between bursts? Judging from the graphs below, both modes sends a bursts that increases the output voltage before going to sleep:

Wn83EIs.png


The datasheet states that the regulator will automatically switch from continous mode to either burst mode or pulse skipping mode if the output current is low enough, but if these modes are more efficient than continous mode, how come it doesn't run in these modes all the time? In continous mode, the pulse width is adjusted to match the current demand, but the efficiency of the regulator does not depend on the pulse width, right? Does this mean that running burst mode for as long as possible is always the most efficient?
 

Plecto said:
Hi. I'm looking for a dual low quiescent current switching regulator, but theres a couple of things I don't quite understand with these regulators. Looking at the LTC3622 (http://cds.linear.com/docs/en/datasheet/3622fc.pdf); it has two modes it can go into if the ouput current is low enough, burst mode and pulse skipping mode. The datasheet states the following:



Does this mean that burst mode and pulse skipping mode is essentially the same, the difference being that burst mode has 12 times as high inductor current which leads to a higher output capacitor which again leads to longer time between bursts? Judging from the graphs below, both modes sends a bursts that increases the output voltage before going to sleep:

Wn83EIs.png


The datasheet states that the regulator will automatically switch from continous mode to either burst mode or pulse skipping mode if the output current is low enough, but if these modes are more efficient than continous mode, how come it doesn't run in these modes all the time? In continous mode, the pulse width is adjusted to match the current demand, but the efficiency of the regulator does not depend on the pulse width, right? Does this mean that running burst mode for as long as possible is always the most efficient?
Click to expand...
The different modes give tradeoffs between ripple and efficiency at differing parts of the load-line curve. Burst mode gives high efficiency across a wide range by always operating the converter in continuous conduction mode (or in sleep mode). The downside is the much higher low frequency ripple resulting from the sleep mode. Pulse skipping mode basically takes that same idea and extends it to even lower output current conditions.
 

Many PWMs will sort of default to an "undesigned" pulse
skipping mode when you approach min on time limit.
There can be problems with "runt pulses" though, ones
that become so short that they fail to fully transition.
So there may be some internal decision logic that makes
pulses either well-formed or not at all, and this can be
easily extended to an explicit "feature" with only some
datasheet text.

Pulse skipping makes the output non-fixed-frequency
and discontinuous conduction, which can affect inductor
requirements, stabilization and so on. Burst mode is "all
or nothing" fixed frequency.

Those cartoons don't do a good job of showing any
difference in behavior or outcome. They both look like
burst mode to me. Pulse skip should be sparse, not a
bunched pulse train and "dead air".
 

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