msdarvishi
Full Member level 4
Hello everybody,
Can any one let me know the limitations and advantages associated with Partial Reconfiguration in FPGAs? Are there extra special limitations and advantages for Partial Reconfiguration in Xilinx Virtex FPGAs as well?
Thank you,
Can any one let me know the limitations and advantages associated with Partial Reconfiguration in FPGAs? Are there extra special limitations and advantages for Partial Reconfiguration in Xilinx Virtex FPGAs as well?
Thank you,