Link and description of Defgen 3.2

Defgen 3.2 is an automatic Test Pattern Generator (TPG) software tool for combined IDDQ and/or voltage testing for combinational circuits using basic gates.
The Defgen system consists of several TPG and fault simulation tools.
TPG process is split into two phases:
1. Test pattern generation for fault detection and fault coverage is expressed by fault conditions coverage.
2. Defect localization based on a selected library (the defect library can be modified by user).
All TPG and fault simulation tools run in an user-friendly graphical environment.
Input: circuit description is in ISCAS'85 and EDIF formats.
Outputs: Test set, lists of non-covered and covered fault conditions and defects

Tools
DetGen (Deterministic generator)
RndGen (Random generator)
Sim (Simulator)
FaultSim (Fault simulator)
LocGen (Localization generator)
Edif/Iscas (Convertor between EDIF and ISCAS'85 formats)

Supporting tools
Automatic Library Builder (ALB)



1.h**p://ups.savba.sk/diag/download/DefGen/

* -> t
tnx

do you know others fault simulators or some materials for it