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The first and formost thing u need to have more gate contact to the input diff pairThis will redice ur gate resistance.cover ur entire gate with gate contacts.
AS usual provide dummis on both sides of the diff pair and current mirrors.
If this is design is in 90nm or below its better to have all the songle finger devices to the diff pairs and current mirrors to avoid the LOD and WPE effect which will have the effect on the currentof the mirros.
Also try to maintain metal directions as odd numbers in vertical and even numbers in horizantal or vise versa.USe wide metals for the power bus.
One more most important thing i please provide guard rings where ever possible. at leas for diff pairs and mirrors (must).
any metal crossing poly will form parasitic transistor. be careful.
About layout of diff amp,i cant c the exact layout but do take care about functioning of diffamp bcausue total current flow through each branch at switching time.
It is qite good. What i am worried is you have tried to match using cross quadering and in that one cross is using poly and another cross of input is metal that way it will eat out proper matching.
how it is if you use poly-metal-poly for cross in bothinput? Well matching!!!!!!!
This layout looks fine to me .. But i would suggest that your guard ring should cover the complete NMOS input pair. You have left it incomplete at the point where input pins are being routed to diff pair. The reason for putting a complete guard ring is for reducing substrate noise and sinking the leakage current. You should ensure the active M1-P is also continuous around the input NMOS pair.
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