udaykamboj
Newbie level 3
I am working on implementing an optimised AES Encryption/Decryption Algorithm in either an FPGA/CPLD. Could anyone tell me which one is better to use and why?
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udaykamboj said:I am working on implementing an optimised AES Encryption/Decryption Algorithm in either an FPGA/CPLD. Could anyone tell me which one is better to use and why?
cdcll said:if your project needs alot of resources, you have to choose FPGA, but some of CPLDs, from @ltare(MAXII) and LATICE etc, have more resources than before, you may estimate the required resources first.