What to take into account when doing power estimation of a design with memory blocks?

Hi folks,

I have a couple of questions regarding power estimation ...

1. Are there any special considerations that I need to take into account when doing power estimation of a design containing memory blocks ?

2. How does the Power Compiler tool deal with memory blocks during power estimation of a design ? Does it takes them into consideration anyhow ?

Any responses are highly appreciated
Thx in advance

Re: Power estimation

hmmmm ... I see still there are no responses !!! Is this issue really a hard one ??

ok, I'll try to reformulate my issue ...

I have a typical design with memory blocks in it (1Port SRAM). And I'm trying to characterize this design for power using Power Compiler. Actually I use the general power estimation flow described in Power Compiler's user guide and get the power report for my design. Power report contains both dynamic and static power numbers for all design hierarchy. Now what I'd like to know ... Do this power numbers include memory power also ??? Or I need to subtract memory power value from the number listed in the power report ??

looking for responses ...

Power estimation

As far as I know you need .alf models generated by memory compiler to do a power estimation including the memory.. have u used them??? does ur hierrachical report show power of memory listed??

Re: Power estimation

thx for response whizkid

I haven't used any .alf models !!!! what for I need them ??
the hierarchical report doesn't show the power for memory, because memory is a black-box for DC/Power Compiler. Memory have been included into synthesis process by means of it's .lib model. And the memory .lib model contains info about memory's power (internal power, leakage power). So I think Power Compiler can take this info about memory's power from .lib model and account it during calcualtion of the design block which contains the memory. Am I right ???

Re: Power estimation

sorry the .alf is used by Sequence power tool.. may be .lib is enough for power compiler.. did u check the power compiler manual regarding that? but i wonder how dynamic power can be estimated with .lib file....

Please proceed with ur current idea.. ie using .lib with power compiler and let us also know what happened ...

Re: Power estimation

since the bitlines of memory can be small signal, so you have to run spice simulation to find out the dynamic power and static power. Also due to its big size, you can not use the original schematic, you have to build your own schematic to reduce the number of memory cells used in simulation.

But if the memory is built by memory compiler, then I think you maybe find the power number from the tool.

Re: Power estimation

2 whizkid:

I checked the Power Compiler manual and didn't find any specific info about power estimation of designs with memory blocks. What concerns to .lib models of course they include data about memory's leakage and internal power. However, they can't be used for switching power estimation. Actually I tend to think that Power Compiler accounts memory's power (both static and dynamic) during design's power estimation, though I couldn't find anything about it in Power Compiler manual. So this is only a guess and I still need some reliable source to be sure about it.

2 bg21359:

The memory is generated with memory compiler and the info about memory's power consumption is given in the memory's datasheet. But my issue is that I want to know how to estimate design's power consumption containing memory using Power Compiler. If design does not contain memories I can easily estimate it's power consumption using Power Compiler with the flow given in manual. But I'm not sure that this flow is valid for power estimation of designs with memory blocks. So what I really need is probably someone already having experience with Power Compiler and being able to explain me the details regarding this issue.

Thanks for responses !!!