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  1. #1
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    P mosfet turns on/voltage at drain during powerup

    Attached is the waveforms for P MOS and sch

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    Yellow is Vs
    Blue is Vg
    Pink is Vd
    Orange is Vsg

    I have a Switch (used tactile for reference but is a rocker switch) at the source as shown

    The moment I press the switch I see a rise at Vd and it comes back to zero after about 20ms (Why does this happen)

    Note: Q8 is off initially

    Ideally Mosfet should turn ON only when Q8 is ON.

    What could be causing Vd to rise and fall the moment switch is turned ON.

    - - - Updated - - -

    Also Note:
    D45 and C136 not loaded
    After the switch I have a 470uF x 2 electrolyte caps

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  2. #2
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    Re: P mosfet turns on/voltage at drain during powerup

    Hi,

    * defective scope probe
    * bad solder joint
    * wrong scope setup AC/DC

    Klaus
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    Re: P mosfet turns on/voltage at drain during powerup

    Remove C139. You should not have a capacitor between gate and drain.
    When you press the button, C136 and C139 form a capacitive voltage divider that will switch on the MOSFET for a while.
    If you want a capacitor on the output, the negative side should be connected to ground.



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    Re: P mosfet turns on/voltage at drain during powerup

    Hi,

    You should not have a capacitor between gate and drain.
    I often have a capacitor between gate and drain. Especially for a power distribution switch it prevents from fast switch ON of the load.
    In combiniation with the drive resistance it generates an about constant dV/dt...which causes a calculable inrush current on load capacitance.

    Klaus
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    Re: P mosfet turns on/voltage at drain during powerup

    Hi,

    I have a cap on drain and gate to control the turn on time of mosfet (as explained by KlausST)

    Meanwhile I have not loaded C136.



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  6. #6
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    Re: P mosfet turns on/voltage at drain during powerup

    I have a cap on drain and gate to control the turn on time of mosfet (as explained by KlausST)
    The cap also causes slow turn off. As the FET has initially zero Vds, the cap further causes the observed output pulse after switch closure because Vds can only ramp up slowly.



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