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  1. #1
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    Matching of big array transistors

    dear friends,

    I am matching five transistors using this matching array

    ABCD E DCBA

    Where E is the half size of other transistors. All transistors share the same gate but all they have different drain and source connections.

    Kindly you see how the layout becoming large and consuming wiring.

    Do you think it is not practical to match five transistors ?

    Thank you

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    Re: Matching of big array transistors

    E is dummy device?

    I am not sure, but drain and source connections shouldn't matter too much, rather the bulk of the transistors.
    Group same NMOS (A,B) and same PMOS (C,D) transistor pairs, like this:

    E A B E F C D F
    E B A E F D C F

    E is NMOS dummy, F is PMOS dummy.
    "Try SCE to AUX." /John Aaron/


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  3. #3
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    Re: Matching of big array transistors

    Dear frank,

    my array is only NMOS transistors and E is normal transistor not a dummy.

    by any way either mine or your array is a two side connection to connect the upper side terminals to the the down transistors terminal.

    Since I have 5 transistors, I used 10 horezontal wires up and the same down... then the matched array becomes very big, most of it is dominated by the wiring. I am thinking by this way it will add large parasatics. How in literature suggest to connect higher order of arrays, I really doubt it.

    May be I will support my question with image as soon as possible

    Thank you again



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  4. #4
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    Dominik Przyborowski's Avatar
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    Re: Matching of big array transistors

    Read papers about D/A Converters. There is a lot of stuff how to deal with layout effects for large number of matched transistors - both for dc like for high speed optimization.


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