promach
Advanced Member level 4
For the operation of emitter-coupled logic and sedra smith book,
1) Compared to CMOS, why ECL is the fastest logic family given that it requires so many gates to propagate to output Y (T5 emitter node) ?
2) Why current drawn from the power supply remains constant during switching and regardless of which state the ECL is in ?
3) How is the reference voltage Vr made insensitive to temperature and PSRR according to calculation made below ?
1) Compared to CMOS, why ECL is the fastest logic family given that it requires so many gates to propagate to output Y (T5 emitter node) ?
2) Why current drawn from the power supply remains constant during switching and regardless of which state the ECL is in ?
3) How is the reference voltage Vr made insensitive to temperature and PSRR according to calculation made below ?