promach
Advanced Member level 4
Have anyone used this 2M multiplication method ?
1) How does the increase of logN in area complexity resulted in regular layout ?
2) Besides, adding those '2' (or two '1's in binary, just imagine putting 1'b1 on top of each other vertically) by itself also requires carry-save adders which may also contribute to the overall latency or delay as well as resulted in irregular layout ?
By trading a small factor of logN in the asymptotic area, the following algorithm gives a feasible and nicely regular silicon layout
1) How does the increase of logN in area complexity resulted in regular layout ?
2) Besides, adding those '2' (or two '1's in binary, just imagine putting 1'b1 on top of each other vertically) by itself also requires carry-save adders which may also contribute to the overall latency or delay as well as resulted in irregular layout ?
Last edited: