constant beta of NPN transistor over a large range of ib or ic.

By design method, any architecture can realize a constant current gain(beta) over a large input (ib) range?

Unlike the typical current gain as shown in this figure, the gain should be a constant line.

shanmei said:

By design method, any architecture can realize a constant current gain(beta) over a large input (ib) range?

Unlike the typical current gain as shown in this figure, the gain should be a constant line.


View attachment 131995

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Don't know of any way to do that.
Normally the voltage gain of a transistor is stabilized with negative feedback, such as an unbypassed emitter resistor.

A robust design would attempt to center the operating
point in the hFE-Ic "flat top" but competing interests
(esp. low power consumption) tend to drive designs
toward the lower end where variability and component
drift is, alas, highest.

Bias circuit should be designed to put the rest of the
circuit "in the happy place".

You rarely care that hFE is constant, in itself; more
often you only want to ensure a tolerable minimum.
I'd expect there is some "replica feedback" biasing
scheme that might be able to achieve a constant-
hFE bias point (if you are willing to let current vary
freely) but if you look at the curve, everywhere
except the peak hFE has two "right answers" and
you would need some care to ensure that the right
"right answer" gets picked all the time, and not
toggle between the two when some spurious "input"
is presented (like simple supply spikes).