sys_eng
Full Member level 4
1)latchup prevention, To reduce disturbances from minority carrier, guard ring around noisy transistors can be used. Guard ring considerations are as following,
(i) NMOS in the p-substrate with should be surrounded by N-well guard ring.
N-well guard ring should be tied to VDD. The N-diffusions from the NMOS could inject stray electrons into the substrate. These stray electrons could be collected efficiently by the N-well guard ring that is biased to VDD to attract the electrons.
(ii) PMOS in the N-well should be surrounded with P-diffusion guard ring.
P-diffusion guard ring should be tied to ground. P-diffusions from the
PMOS inject stray holes into the N-well. These stray holes could be collected efficiently by the P-diffusion guard ring that is biased to ground to attract the holes.
2)To reduce substrate coupling noise, the guard ring may be used in the following configuration around critical transistors.
(i) Surround NMOS in the p-substrate with p-tap guard ring that is connected to ground.
(ii) Surround PMOS in the N-well with n-tap guard ring that is connected to VDD.
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my conclusion is these are two opposite mechanism, one is draw in, and the another is to repell.
The guard rings used for latchup prevention is to draw in the extra electrons for NMOS and extra holes for PMOS. Whereas the guards rings used in substrate noise reduction to repell extra electrons from NMOS away from guard ring therefore made the electrons stay inside and affect other areas in the substrate; Likewise for PMOS guard ring.
Is that correct?
(i) NMOS in the p-substrate with should be surrounded by N-well guard ring.
N-well guard ring should be tied to VDD. The N-diffusions from the NMOS could inject stray electrons into the substrate. These stray electrons could be collected efficiently by the N-well guard ring that is biased to VDD to attract the electrons.
(ii) PMOS in the N-well should be surrounded with P-diffusion guard ring.
P-diffusion guard ring should be tied to ground. P-diffusions from the
PMOS inject stray holes into the N-well. These stray holes could be collected efficiently by the P-diffusion guard ring that is biased to ground to attract the holes.
2)To reduce substrate coupling noise, the guard ring may be used in the following configuration around critical transistors.
(i) Surround NMOS in the p-substrate with p-tap guard ring that is connected to ground.
(ii) Surround PMOS in the N-well with n-tap guard ring that is connected to VDD.
=================
my conclusion is these are two opposite mechanism, one is draw in, and the another is to repell.
The guard rings used for latchup prevention is to draw in the extra electrons for NMOS and extra holes for PMOS. Whereas the guards rings used in substrate noise reduction to repell extra electrons from NMOS away from guard ring therefore made the electrons stay inside and affect other areas in the substrate; Likewise for PMOS guard ring.
Is that correct?