ZHazami
Newbie level 5
Hi!
We have manufactured a PA test circuit with a LDMOSFET transistor (push-pull, two transistor in one package). during the DC test, by a small change in the bias voltage (Vgs) at one point, the current increases dramatically. this behavior happens for both transistor. We tried to test transistors and PCB separately by applying voltage of drain and gate at the bias point. We saw that during the test of the PCB, if we just apply voltage in one part of the circuit either input (Vgs) or output (VDS), we will have voltage in the other part. Regarding the test of transistors, knowing we have a broken transistor, we have normal behavior for both transistor of one package(zero voltage at one transistor when we apply voltage to the other).
Could anyone explain this action?
We have manufactured a PA test circuit with a LDMOSFET transistor (push-pull, two transistor in one package). during the DC test, by a small change in the bias voltage (Vgs) at one point, the current increases dramatically. this behavior happens for both transistor. We tried to test transistors and PCB separately by applying voltage of drain and gate at the bias point. We saw that during the test of the PCB, if we just apply voltage in one part of the circuit either input (Vgs) or output (VDS), we will have voltage in the other part. Regarding the test of transistors, knowing we have a broken transistor, we have normal behavior for both transistor of one package(zero voltage at one transistor when we apply voltage to the other).
Could anyone explain this action?