biju4u90
Full Member level 3
In many articles, I have seen that latch inference has to be avoided because it makes STA complicated. How STA becomes complicated if a latch is inferred in my design instead of an FF?
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Although in simulation you'll see the latch reacting in zero time - the real behavior of the circuit will have timing characteristics that are hard to predict and may vary strongly with temperature change.
In many articles, I have seen that latch inference has to be avoided because it makes STA complicated. How STA becomes complicated if a latch is inferred in my design instead of an FF?