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Help me select SPLD/CPLD device

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circuit

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I am new to CPLD/FPGA. I am building a board where in there is one external clock (master clock) through a SMA connector. Now I would like to generate 2 clocks of same frequency with a slight delay of around 5 ns between them and a third sync pulse which has a variable period. say for ex, master clock is 20MHz, i need sync pulse period as 2ms(dependent on the input clock that i provide by some factor) and its ON period is say 196 cycles of masterclock.

I have some experience programming with VHDL. I was suggested to use a SPLD/CPLD device and code it. I am not sure which device to choose ? Any suggestions welcome. Thanks
 

selecting SPLD, CPLD

5ns means 200MHz clock not 20MHz short time!
 

selecting SPLD, CPLD

Hi,
I don't you can accurately create a 5ns signal using a CPLD. You need a clock distribution device like the ones from Cypress or other companies to create your delay.

For the 3rd sync, you can use a CPLD (any $1 device would go).

BR,
/Farhad
 

selecting SPLD, CPLD

Salam,

See this document.

**broken link removed**

Bye
 

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