Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Current mirror with FETs

Status
Not open for further replies.

srinivasbakki

Junior Member level 1
Joined
Jan 11, 2010
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,406
Hi,
Iam trying to understand how current mirror with FET works. I read on wikipedia that Id is a function of Vdg and Vgs, sure enough. and Keeping Vdg = 0 and driving a current with current source shall set the Vgs. This part is confusing - unless you have Vgs how can the mosfet even allow Id ?
As i Understand - the channel of the mosfet allows current only if there's a Vgs enough to widen the channel and Vdg helps in sucking the current.

Current mirror with BJTs is clear: the collector resistor connected to the base drives base current to bias the transistor and thus sets Vbe.

Can somebody explain current mirror with mosfets ?

Thanks,
Srinivas
 

At start-up, VGS increases from 0 to the required final value to pass the required Id.

broken link removed
 

Attachments

  • current mirror eda.PNG
    current mirror eda.PNG
    38.1 KB · Views: 84
Last edited by a moderator:

Well, i understand Vgs kicks off to the required value to drive the current. But what's the trigger for Vgs to increase ?
 

If you see from the circuit I attached, there, the gate charges through R1 from the supply. This causes Vgs to increase since the gate is being charged.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top