Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Replacing PLL with a ramp signal and clock

Status
Not open for further replies.
W

want_to_know

Newbie level 4
Joined
Jan 17, 2014
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
60
Hi all,

How can a ramp signal and clock be used to replace a PLL (phase locked loop) in the case where I know frequency is always fixed at say 60 Hz?

Thanks
 

You have not given enough information for us to give useful answers.
Please describe what you want to do in more detail.
What is the purpose of the output signal?
What is the input frequency to the PLL?
 

throwaway18 said:
You have not given enough information for us to give useful answers.
Please describe what you want to do in more detail.
What is the purpose of the output signal?
What is the input frequency to the PLL?
Click to expand...

I want to use PLL to lock the grid frequency, then I want to synchronize my system frequency to be the same as this grid frequency . Since I know grid frequency is always fixed at 60Hz (for example), I was told that I can instead use a ramp signal along with clock to replace PLL in Simulink, but I don't understand and would need more explanation why we can do so. I hope I could explain more but I am too new to this and hope you could give me some ideas for me to understand. Many thanks
 

More information is needed but I'm guessing the method being suggested is to phase lock (but not frequency lock) an oscillator using a coincidence detector. Basically the oscillator being locked produces a ramp output and it's timing is compared to the zero crossing of the grid waveform. The point at which they coincide along the ramp is used to phase lock the oscillator. I've no idea of how to do this in Simulink I'm afraid.

If this is for synchronizing a power source to the grid, as in a grid tied inverter, it would be wiser to use a PLL so it can adjust to small variations in grid frequency.

Brian.
 
A grid tied inverter or active front end must be synchronized to the grid, but there are no limitations how it can be achieved. In a simple analog design, you can e.g. use the bandpass filtered grid voltage as reference.

The choice depends on your application requirements and specification, e.g. frequency range, noise suppression, additional features like islanding detection. I presume that any popular or theoretically feasible method can be modelled in Simulink.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top